Japanese Unexamined Patent Publication No. Hei 8(1996)-311699 (Patent Document 1) discloses a technology of stirring a plating solution present in the vicinity of a wafer with a view to minimizing unevenness of a plating thickness during electroplating of the wafer.
Japanese Unexamined Patent Publication No. 2006-22379 (Patent Document 2) discloses, in gold electroplating for the formation of a bump electrode of a wafer or the like, an electroplating technology using an anode electrode obtained by platinizing a titanium base material and then coating the resulting base material with iridium oxide in order to improve the evenness of a plating thickness and eliminate maintenance of a plating apparatus.
Japanese Unexamined Patent Publication No. 2004-197228 (Patent Document 3) discloses, in copper electroplating for damascene interconnection, a technology of plating at a low electric current first and then plating at a high electric current in order to form a buried copper interconnect having no voids.
[Patent Document 1]
    Japanese Unexamined Patent Publication No. Hei 8(1996)-311699[Patent Document 2]    Japanese Unexamined Patent Publication No. 2006-22379[Patent Document 3]    Japanese Unexamined Patent Publication No. 2004-197228